The table below summarizes the current status of the EVL ports to particular SoCs which we are aware of. It is definitely not meant to be exhaustive: many SoCs which are not listed here may just work out of the box with a recent EVL-enabled kernel release, especially in the x86 and arm64 ecosystems (arm32 might require more work in some cases). New SoCs sporting interrupt chip controllers, timer or clock sources which have not been made pipeline-aware yet may need the corresponding kernel drivers to be marginally fixed up for that purpose. See the porting guide for more.
If you are interested in porting your own autonomous core to a particular kernel release Dovetail supports, you certainly need the IRQ pipeline column matching the target platform to be checked, and likely the Alternate scheduling column as well. Running the EVL core requires both features to be available. If you ported EVL to a SoC which does not appear in this list and want to let people know about it, please drop me a note at rpm@xenomai.org.
The Xenomai 4 project primarily tracks the mainline Linux kernel. In absence of any specific information, all kernel releases mentioned below refer to mainline Linux.
To get EVL running on a platform, we need the following software to be ported in the following sequence:
the Dovetail interface. This task is composed of two incremental milestones: first getting the interrupt pipeline to work, then enabling the alternate scheduling. Porting Dovetail is where most of the work takes place, the other porting tasks are comparatively quite simple.
the EVL core which is mostly composed of architecture-independent code, therefore only a few bits need to be ported (a FPU test helper for the most part).
the EVL library. Likewise, this code has very little dependencies on the underlying CPU architecture and platform. A port boils down to resolving the address of the clock_gettime(3) in the vDSO.
Current target kernel release
Linux v6.12
ARM64 SoC
SoC (Board) | IRQ pipeline1 | Alternate scheduling | EVL base2 | EVL stress3 | Test kernel |
---|---|---|---|---|---|
Amlogic S905X3 (Odroid C4) | v6.12-rc4 | ||||
Broadcom BCM2711 (Raspberry PI 4 Model B) | v6.6 | ||||
Broadcom BCM2837 (Raspberry PI 3 Model B) | v5.7-rc7 | ||||
Qualcomm QCS404 | v5.1-rc3 | ||||
Qualcomm Snapdragon 410E (DragonBoard 410c) | v5.0 | ||||
HiSilicon Kirin 620 (HiKey LeMaker) | v5.5-rc7 | ||||
NXP i.MX8M Mini (Variscite DART-MX8M-MINI) | v6.1* | ||||
QEMU virt | v6.12-rc4 | ||||
Xilinx Zynq UltraScale+ (ZCU102) | v5.9 |
* Mainline kernel with SoC-specific bits picked from the vendor tree.
ARM SoC
SoC (Board) | IRQ pipeline1 | Alternate scheduling | EVL base2 | EVL stress3 | Test kernel |
---|---|---|---|---|---|
TI AM335x-GP (BeagleBone Black) | v6.10 | ||||
Broadcom BCM2835 (Raspberry PI Zero) | v5.7-rc6 | ||||
Broadcom BCM2836 (Raspberry PI 2 Model B) | v5.15 | ||||
STMicro Cannes2-STiH410 (B2260) | v5.2-rc7 | ||||
Altera Cyclone V SoC FPGA (DevKit) | v6.6 | ||||
Exynos 5422 (Odroid XU4Q) | v6.6 | ||||
AllWinner H3 (NanoPI NEO) | v5.5-rc2 | ||||
NXP i.MX6QP (SabreSD) | v6.12-rc4 | ||||
NXP i.MX6Q (phyBOARD-Mira) | v6.9 | ||||
NXP i.MX7D (SabreSD) | v6.6 |
X86_64
Chipset (Module) | IRQ pipeline1 | Alternate scheduling | EVL base2 | EVL stress3 | Test kernel |
---|---|---|---|---|---|
QEMU KVM | v6.12-rc4 | ||||
Intel Atom x7-E3950 | v6.12-rc4 | ||||
Intel Atom x5-E3940 (TQMxE39M) | v6.12-rc4 | ||||
Intel C236 core i7 quad (DFI SD631) | v6.12-rc4 | ||||
Intel Desktop Board DQ45CB (Legacy) | v6.11 |
1 Means that the pipeline torture tests pass (see
CONFIG_IRQ_PIPELINE_TORTURE_TEST
). This milestone guarantees that we
can deliver high-priority interrupt events immediately to a guest
core, regardless of the work ongoing for the main kernel.
2 When this box is checked, EVL’s basic functional test suite runs properly on the platform, which is a good starting point. So far so good.
3 When this box is checked, the EVL core passes a massive stress test involving the
hectic
and latmus
applications running in parallel along with the
full test suite for 24 hrs, all glitchlessly. This denotes a reliable
state, including flawless alternate scheduling of threads between the
main kernel and EVL. On the contrary, a problem with sharing the FPU
unit properly between the in-band and out-of-band execution contexts
is most often the reason for keeping this box unchecked until the
situation is fixed.